Introduction
The ever-growing demand for high-speed data transmission in optical communication systems, fueled by the rise of technologies like autonomous vehicles, telemedicine, augmented reality (AR), and virtual reality (VR), has necessitated the development of innovative solutions. One such promising approach is the III-V/Si hybrid photonic integration, which combines the benefits of III-V compound semiconductor devices and silicon photonic devices, enabling high-speed and low-power-consumption operation.
Among the heterogeneous integration methods, the chip-on-wafer bonding technique stands out as a highly suitable approach for achieving high-density integration of various active regions on Si waveguides. In this tutorial, we will explore the fabrication and characteristics of an SOA (Semiconductor Optical Amplifier) integrated InP/Si hybrid tunable laser, a breakthrough device that leverages this cutting-edge technology.
Device Structure and Fabrication
The SOA integrated InP/Si hybrid tunable laser boasts a unique structure, as illustrated in Figure 1(a). In this device, different InP chips are utilized for the laser and SOA sections, each with a gain section length of 1.1 mm. The laser cavity incorporates two micro-ring resonators with different circumference lengths and a phase control section, allowing for wavelength tuning. These sections are equipped with micro-heaters on top of the SiO2 upper cladding layers.
The cross-sectional view of the gain section for the tunable laser and SOA is depicted in Figure 1(b). The device adopts an InP shallow ridge structure, which includes a GaInAsP multiple-quantum-well (MQW) structure. The current path is defined by the InP ridge structure, while the optical confinement factor for the active layer is determined by the InP ridge width and Si waveguide width.
The fabrication process employs the chip-on-wafer bonding technique, which begins with dicing an InP-based epitaxial wafer into small chips measuring 0.5 mm × 1.6 mm. This reduction in chip size by 80% allows for increased integration density. Meanwhile, Si waveguide patterns are formed on a silicon-on-insulator (SOI) wafer using electron beam lithography and dry etching processes.
Next, the surface of the InP chips undergoes a UV-ozone surface treatment to make it hydrophilic, facilitating direct bonding onto the SOI wafer using a pick-and-place technique. As shown in Figure 2, 504 InP chips have been successfully bonded onto the SOI wafer.
After removing the InP substrates, only the epitaxial layers remain on the SOI wafer. The InP shallow ridge for the gain section and two-step taper structures are formed through photolithography and etching processes. The two-step taper optically connects the gain sections with the Si waveguide section. Following the deposition of an upper SiO2 cladding layer for Si waveguides, electrodes for the laser and SOA are formed, and a micro-heater is fabricated for each tuning section. Finally, the facets of Si waveguides are coated with anti-reflection films.
Characteristics of Fabricated Devices
The performance of the fabricated SOA integrated InP/Si hybrid tunable laser is promising. Figure 3 illustrates the SOA current-light output characteristic, where the laser current ITLD is fixed at 220 mA. As the SOA current increases, an enhancement in light output power is observed, with a maximum light output power of 26 mW achieved under continuous wave (CW) conditions at a temperature of 25°C.
Furthermore, a single tunable laser with the same design was fabricated for comparison. Figure 4 displays the superimposed spectra of this device at a laser current of 145 mA. Remarkably, a wide quasi-continuous wavelength tuning range of 40 nm and single-mode operation with a sub-mode suppression ratio (SMSR) of higher than 40 dB for the entire tuning range are achieved, thanks to the two-step taper structure with small wavelength dependence.
Conclusion
The successful demonstration of the SOA integrated InP/Si hybrid tunable laser by the chip-on-wafer bonding technique represents a significant milestone in the field of photonic integration. The experimental results validate the successful bonding of InP chips with a compact size of 0.5 mm × 1.6 mm onto an SOI wafer, enabling high-density integration.
The fabricated device exhibits impressive performance, with a maximum light output power of 26 mW, attributed to the integration of the SOA. Additionally, it achieves a wide wavelength tuning range of 40 nm with an SMSR of more than 40 dB across the entire range, thanks to the two-step taper structure with minimal wavelength dependence.
These remarkable achievements underscore the potential of the III-V/Si hybrid integration by chip-on-wafer bonding technique as a key technology for the next generation of photonic integrated devices. With its ability to combine the strengths of different material systems, this approach paves the way for high-speed, low-power, and highly integrated optical communication systems, poised to meet the ever-increasing demands of emerging technologies and applications.
Reference
[1] T. Hiratani et al., "SOA Integrated InP/Si Hybrid Tunable Laser by Utilizing Chip-on-Wafer Hydrophilic Bonding," Photonics Electronics Technology Research Association (PETRA), Tokyo, Japan; Transmission Devices Laboratory, Sumitomo Electric Industries, Ltd., Yokohama, Kanagawa, Japan; Dept. of Electrical and Electronic Engineering, Tokyo Institute of Technology, Tokyo, Japan, 2024, pp. 1-6, doi: 979-8-3503-9404-7/24/$31.00 ©2024 IEEE.
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