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Coherent Transceiver Evolution: Maximizing Performance, Minimizing Size and Power, and Integrating System-Level Functions

Introduction

The evolution of silicon technology has been a key driver in the development of coherent optical transceivers, enabling significant advancements in performance, power consumption, and form factor. This tutorial explores the three primary vectors of coherent transceiver evolution and how different coherent solutions prioritize these vectors to address a wide range of application requirements.

Coherent Transceiver Selection Criteria

When selecting the optimal coherent transceiver, network operators must consider a wide range of criteria, including both CapEx and OpEx factors. CapEx-related criteria include transceiver cost per bit, xponder costs, optical line system compatibility, fiber costs, and switch/router compatibility. OpEx considerations involve power consumption, footprint, manageability, and the number of wavelengths and truck rolls required.

The importance of these criteria varies based on the specific application, as shown in Figure 1. For example, data center interconnect (DCI) applications prioritize transceiver cost per bit, power consumption, and pluggability, while long-haul networks focus more on wavelength capacity-reach, optical line system compatibility, and spectral efficiency.

Different applications will prioritize different criteria
Figure 1: Different applications will prioritize different criteria
Key Technology Enablers

The advancements in coherent transceivers have been driven by the evolution of CMOS process nodes, which have provided significant gains in processing power, power consumption, and area. For example, the transition from 16 nm to 7 nm CMOS technology has enabled a 30% performance improvement, a 60% power reduction, and a 70% area reduction.

This CMOS process node evolution has allowed digital ASIC/DSP designers to build more powerful chips, enabling dramatic improvements in coherent performance. Table 1 outlines the key characteristics of different coherent generations, from 65 nm to 7 nm CMOS.

Table 1: Coherent generations and CMOS process nodes

 

65 nm

40 nm

28 nm

16 nm

7nm


Years

2010-2012

2013-2014 

2015-2017

2016-2018

2018-2019

2020-2021

Number of Transistors

(Digital ASIC/DSP)

10s of millions

A few 100 million

~1.5 billion

~2.5 billion

>5 billion1


Max Wavelength

100 Gb/s

100 Gb/s

200 Gb/s

400 Gb/s

600 Gb/s

800 Gb/s

Baud Rate (Gbaud)

~30

~30

~30

45 Gbaud/64QAM,

56 Gbaud/32QAM, or

64 Gbaud/16QAM

N60-70

N90-100

Max Modulation

(per Polarization)

QPSK

QPSK

16QAM

64QAM

64QAM


Advanced Features

HD-FEC

SD-FEC

Nyquist shaping

Nyquist subcarriers1

SD-FEC gain sharing1

 

Hybrid modulation First-gen PCS

LC-PCS1


Second-gen Nyquist1


DBA1

C-band Capacity

9.6 Tb/s

9.6 Tb/s

~25.6-27.61 Tb/s

~25.6-38.4 Tb/s

38.4 Tb/s

42.4 Tb/s1

Spectral Efficiency

2 bits/s/Hz

2 bits/s/Hz

~5.3-5.751 bits/s/Hz

~5.33-8 bits/s/Hz

8 bits/s/Hz

8.833 bits/s/Hz1

Power Consumption

~1.o-2.0 W/G

~1.o-2.0 W/G

~0.5 W/G

~0.4-0.7 W/G

~0.2 W/G

<0.2 W/G1

1. Infinera-specific (ICE4, ICE6)

The Three Vectors of Coherent Evolution

Coherent transceivers are evolving along three primary vectors, as shown in Figure 2:

1. Maximize Performance and Advanced Optical Features:

  • Leverage the highest possible baud rates and most advanced optical features, such as high-order modulation, Nyquist subcarriers, probabilistic constellation shaping, and advanced forward error correction.

  • This vector focuses on maximizing wavelength capacity, wavelength capacity-reach, and spectral efficiency.

2. Minimize Space and Power:

  • Reduce the watts and rack units per Gb/s, enabling compact pluggable form factors such as CFP2, OSFP, and QSFP-DD.

  • This vector prioritizes power efficiency and small size, often at the expense of some advanced features.

3. Integrate Systems-level Functions:

  • Migrate functions that previously would have lived in the shelf, shelf controller, or interface card/xponder into the coherent transceiver.

  • This includes integrating features like in-band and out-of-band management, remote management, demarcation, autotuneability, optical spectrum analysis, and even packet functionality.

The three vectors of coherent evolution
Figure 2: The three vectors of coherent evolution
Pluggables and Embedded Optical Engines

Pluggables and embedded optical engines prioritize these three vectors differently, as shown in Figure 3. Embedded optical engines typically focus on maximizing performance and advanced optical features, with some integration of system-level functions. Pluggables, on the other hand, can have varying prioritizations, with some focusing primarily on minimizing space and power (e.g., 100ZR, 400ZR), while others also incorporate higher-performance features and system-level integration (e.g., XR optics, OpenZR+).

Another key difference is the ability to support multi-vendor interoperability. Embedded optical engines prioritize performance and can leverage proprietary features, while pluggables often need to balance performance with standards compliance and interoperability.

Pluggables can also be deployed either directly in the router or in an external xponder, each approach offering different benefits, as shown in Figure 4.

Different prioritizations of the three vectors
Figure 3: Different prioritizations of the three vectors
Deployment options for coherent transceivers
Figure 4: Deployment options for coherent transceivers
Next-generation Coherent Transceivers

This tutorial provides an overview of the key coherent transceiver options enabled by 7 nm CMOS technology:

  1. 100ZR: A low-cost, low-power pluggable solution for metro edge applications.

  2. XR Optics: An innovative point-to-multipoint coherent solution that can deliver significant total cost of ownership savings.

  3. 400ZR (QSFP-DD): A pluggable solution targeting metro DCI applications, with a focus on cost per bit, footprint, and power consumption.

  4. Open ROADM/Proprietary (CFP2): Pluggables that support the Open ROADM MSA specifications, as well as some proprietary solutions.

  5. OpenZR+ (QSFP-DD): An extended-reach version of 400ZR, with some Open ROADM features, in a compact QSFP-DD form factor.

  6. Embedded 800G Optical Engines: High-performance embedded solutions with advanced features like second-generation Nyquist subcarriers, long-codeword probabilistic constellation shaping, and dynamic bandwidth allocation.

Application Fit

The tutorial discusses the fit of these different coherent solutions for various applications:

  • Metro Aggregation: 100ZR and XR optics are well-suited, with XR optics offering significant total cost of ownership savings.

  • Point-to-Point DCI: 400ZR, OpenZR+, and XR optics (in point-to-point mode) are attractive options.

  • Metro Core: 400G pluggables, both ROADM-friendly CFP2s and router-friendly QSFP-DDs, are likely to be favored, with embedded 800G playing a role in networks requiring maximum spectral efficiency.

  • Long-haul: Embedded 800G is preferred for its superior spectral efficiency and fiber capacity, with 400G pluggables finding a niche on shorter routes.

  • Submarine: Embedded 800G is the preferred solution due to its long reach, high spectral efficiency, and flexibility in optimizing for specific submarine scenarios.

Conclusion

The evolution of silicon technology has enabled coherent transceivers to progress along three primary vectors: maximizing performance and advanced optical features, minimizing space and power, and integrating system-level functions. Pluggables and embedded optical engines prioritize these vectors differently, allowing them to address a wide range of application requirements, from metro aggregation to submarine networks.

Reference

[2] "Pluggables, Embeddeds, and the Three Vectors of Coherent Evolution," White Paper, Apr. 2021.

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