High Density Co-Packaged Optics: Enabling Technologies and System Integration

Abstract

The exponential increase in data center traffic is driving the need for higher bandwidth and more power-efficient optical interconnects. Silicon photonics and electronic-photonic co-packaging are promising solutions. This paper reviews recent work by Broadcom demonstrating critical technologies for co-packaged optics including high density assembly, remote laser integration, and optical connectors. A prototype “half optics” co-packaged switch system is presented showing 50% power savings compared to traditional optical modules while matching bandwidth density. The outlook for further improvements in density, power efficiency, and cost at scale is discussed.

Introduction

Data center networks face a bandwidth capacity crunch driven by explosive growth in cloud computing, artificial intelligence, 5G, and Internet of Things workloads. Copper based electrical interfaces are hitting fundamental limits in terms of density, heat dissipation, and distance reach. Pluggable optical transceiver modules temporarily alleviate these issues but face density, power efficiency, and cost challenges when scaling beyond 400G.

Silicon photonics integrated with advanced electronic-photonic packaging (co-packaged optics) promises order-of-magnitude leaps in bandwidth density, power efficiency and cost. This is enabled by scaling high volume CMOS manufacturing techniques to densely integrate optics alongside switch/compute ASICs (application-specific integrated circuits). Heterogeneous co-integration of high speed photonics and electronics tightly couples these domains unlocking performance, efficiency and scalability advantages.

This paper reviews recent work from Broadcom demonstrating critical technologies needed to realize high density co-packaged optics for data center switching. A prototype “half optics” system is presented showing 50% power savings versus traditional optical modules [1]. The outlook for further co-packaging advancements including density, efficiency, reliability and cost are discussed.

High Density Assembly

A key enabler for co-packaged optics is ultra-dense electrical-optical I/O pitch matching. Broadcom’s silicon photonics chiplets in package (SCIP) technology utilizes TSV and high density bonding to align a silicon photonics die to a switch ASIC die at 130um pitch (Fig. 1) [1]. The short (<150um) high density routing achieves under 1pJ/bit energy efficiency, 10X better than pluggables.

Broadcom fabricated a high density 3D stacked assembly using chip-on-wafer bonding of processed ASIC and photonics wafers as shown in Fig. 2 [1]. Robust alignment and bonding are critical as are wafer thinning (to 75um), TSV reveal etch uniformity, and stealth dicing techniques to enable dense scaling. Sequential co-packaging of the bonded chips/optical engine onto a substrate with the switch ASIC follows using solder reflow and precise underfill control.

Figure 1. Pitch matching of I/Os

Figure 2. High density CoW assembly

Remote Laser Integration

Silicon photonics lacks a monolithically integrated laser source so a remote laser module (RLM) supplies the optical power [1]. Broadcom designed a hot-swappable RLM following QSFP-DD form factor specifications providing up to 21dBm optical power per lane with safety interlocks (Fig. 3) [1]. The RLM blinds mates to the optical engine’s connector for simple serviceability.

Figure 3. Remote Laser Module (RLM): backside view on top, assembled view on the bottom

Optical Connector

Broadcom also developed a medium density (127um pitch), hot pluggable optical connector compatible with solder reflow enabling CPO socketing or solder mounting flexibility (Fig. 6) [1]. The custom connector leverages proven fiber array technology ensuring reliability while supporting field replacement. Broadcom has demonstrated low loss, repeatable mating with up to 72 fiber pairs across a compact 14.43mm optical engine die edge. This “pluggable” CPO approach eases system assembly and upgrades.

Figure 4. Optical connector

System Integration and Performance

Fig. 5 shows a prototype Broadcom “half optics” switch system utilizing co-packaged optics [1]. Four optical engines each with 32 100Gbps lanes are co-integrated with a switch ASIC chip. RLMs supply the optical power with one 8-laser RLM supporting each optical engine’s 32 transmit channels. Electrical insertion loss between switch chip and optical engines measures just 2-3dB, 5X lower than pluggable modules (Fig. 6, 7) which cuts interface power in half. The CPO optical performance meets IEEE standards while receiver sensitivity provides ample margin (Fig. 8, 9) [2].

Figure 5. Co-packaged switch system prototypes “half optics” with the top cover removed

Figure 6. Electrical channel insertion loss between the switch ASIC and the optical engine transmitter as shown in the cross section

Figure 7. Electrical channel insertion loss between the optical engine receiver and the switch ASIC as shown in the cross section

Figure 8. CPO transmitter performance

Figure 9. CPO receiver performance

Discussion

This prototype “half optics” system demonstrates the feasibility of co-packaged optics to deliver pluggable-grade bandwidth in half the power. While further engineering is needed for full commercialization, the fundamental density, efficiency and performance advantages stem from tight co-integration. Extending these methods to advanced CMOS nodes and next generation photonics could enable even denser bandwidth scaling.

Lingering technology challenges remain around reliability, thermal design, manufacturability, assembly cost reduction, and control software integration. However, the potential power and cost savings at scale are compelling, especially as data center workloads continue their steep exponential growth trajectory. Co-packaged optics adoption could mirror the rapid transformation of 2.5D silicon interposers for ASIC integration. Promising R&D advancements are emerging in integrated lasers, optical backplanes, and photonic interconnects integrated directly on advanced CMOS.

The next decade will see co-packaged optics enter mainstream use to overcome copper bottlenecks in high performance computing and networking. Critical technology advancements in dense photonics integration and advanced 3D packaging developed by companies like Broadcom provide a roadmap to make this disruptive transition possible.

References

[1] Muth, K et al: “Key Technology Enablers for Co-packaged Optics” September 2022, Invited paper, ECOC, Basel, Switzerland

[2] K. Muth, V. Raghuraman, S. Kannan and H. Potluri, "High Density Integration Technologies for SiPh Based Optical I/Os," 2023 IEEE 73rd Electronic Components and Technology Conference (ECTC), Orlando, FL, USA, 2023, pp. 212-215, doi: 10.1109/ECTC51909.2023.00044.