Introduction
In today's world of portable electronics like smartphones, tablets, and wearables, innovative packaging solutions are crucial to enable greater functionality, better performance, and a smaller footprint, all at a lower cost. Conventional Package-on-Package (PoP) integrates multiple functionalities by stacking packages using through-package vias, offering flexibility, cost improvements, and faster time-to-market. However, to further reduce package profile and enhance electrical and thermal performance, a redistribution layer (RDL) based PoP called Fan-Out Package on Package (FOPoP) has been introduced.
What is Fan-Out Package on Package (FOPoP)?
FOPoP, a core technology pillar in ASE's VIPack™ platform, is an RDL-based package that combines a fan-out bottom package with a standard top package. It utilizes fine pitch plated copper posts for through-mold vertical interconnections. The bottom package has two RDLs (top and bottom routing planes) connected by the copper posts formed through wafer-level fan-out technology, enabling thinner and finer electrical traces.
Fabrication Process of FOPoP
The FOPoP fabrication process is similar to conventional PoP, except that the bottom package is formed by an RDL-first fan-out process, mainly including the following steps:
Note that the copper posts are plated onto the temporary carrier prior to die attach, and the second routing plane is connected to the copper posts exposed from the molding material by grinding.
Benefits of FOPoP
Compared to conventional interposer-based PoP, FOPoP offers a thinner profile and better electrical and thermal performances since the bottom package eliminates the need for an interposer. By using PoP technology, the known good die (KGD) issue can be mitigated as the top package can be burn-in and tested before mounting to the bottom package. The development cycle time and cost can also be reduced since the top and bottom packages can be decoupled from each other in terms of qualification, yield, sourcing, procurement timing, and logistic handling. Additionally, new interconnect capabilities, proximity-driven impedance enhancements, stacked vias, and vertical coupling enablement are key drivers in the new vertical integration methodology used with the FOPoP structure.
For mobile applications, the fundamental high-density, substrate-less configuration of the FOPoP package results in exceptional package performance due to the elimination of substrate parasitic inductance along with a thinner package form factor. Overall, the FOPoP structure provides higher interconnection density and integration through a finer line/space RDL, a shorter interconnect length resulting in better electrical performance, and a smaller, thinner form factor. The FOPoP package platform is enhanced for increasing complexity and high-performance needs by enabling RDL on both sides of the die for increased integration and functionality. Furthermore, both landside capacitors and near-die deep trench capacitors can be implemented to meet the power integrity requirements of advanced nodes.
For networking applications, FOPoP helps enable the next generation of bandwidth from 400G to 800G pluggable optical transceivers while also presenting a highly viable integration solution for Co-packaged Optics (CPO). 3D stacking provides a much shorter interconnection between the photonic integrated circuit (PIC) and controller to reach much higher speeds. Small form factor SiPh engines become easier to package with an ASIC because FOPoP 3D stacking is a higher bandwidth per size solution, which is the key enablement of CPO.
Key FOPoP benefits for the mobile market:
Ultra-low profile achieves almost 40% reduction in height over substrate-based package-on-package structures.
Improved electrical efficiencies deliver power benefits for advanced silicon nodes.
Advanced materials enable good warpage results at high temperatures, allowing for good surface mount yields.
Stable Dielectric Constant (Dk) over a wide high-frequency range with a reduced material response when using Fan-Out Polyimide vs. traditional substrate-based dielectrics.
New processes and structures will allow for an expanded roadmap that will enable both heterogeneous and homogeneous integration of chiplets in the future.
Key FOPoP benefits for the networking market:
Reduces electrical path by 3x and enables a denser bandwidth by up to 8x, allowing engine bandwidth expansion up to 6.4 Tbps per unit.
Improves energy efficiencies from 25pJ/bit to 5pJ/bit.
Controls losses above the 10GHz frequency range.
Offers the most advanced integration of PIC, controller chips, and a special pre-alignment structure for laser, optics, and fiber array units.
Provides sub-μm accuracy and improves optical coupling performance as well as assembly efficiency by using passive alignment.
FOPoP Applications
FOPoP has become a promising 3D integration solution for various combinations, including application processor (AP) and memory, application-specific integrated circuit (ASIC) and antenna-in-package, as well as electronic integrated circuit (EIC) and photonic IC (PIC).
FOPoP addresses complex architectural and integration requirements that help enable next-generation solutions for application processors, mobile devices, automotive applications, antenna in package, and co-packaged silicon photonics. Additionally, FOPoP delivers exceptional performance advantages for augmented reality (AR), virtual reality (VR), mixed reality (MR), and networking applications, where size is paramount for improving the aesthetic form factor, increasing battery space, and achieving power savings through more efficient routing connections.
Summary
Fan-Out Package on Package (FOPoP) technology is a game-changer in the world of portable electronics and networking. Its innovative design, combining a fan-out bottom package with a standard top package and utilizing fine pitch plated copper posts for vertical interconnections, offers a thinner profile, better electrical and thermal performance, and higher interconnection density. With its ability to enable next-generation bandwidth, integrate advanced components like PICs and ASICs, and address complex architectural requirements, FOPoP is poised to drive the future of packaging innovation across various industries, including mobile, automotive, and networking.
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