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Achieving Beyond 300Gb/s with an Integrated CMOS Silicon Photonics Transmitter

Introduction

The ever-increasing demand for higher data rates in optical communications has driven researchers to explore new techniques to push the limits of existing technologies. One promising approach is the use of optical equalization techniques within integrated CMOS silicon photonics transmitters. This tutorial will discuss the work presented in the paper "Beyond 300Gb/s from an integrated single-channel silicon photonics modulator driver combination" by Li et al., which demonstrates data rates exceeding 300Gb/s using optical equalization.

Optical Equalization Concept

Traditionally, signal shaping techniques have been implemented in the electrical domain using components such as feed-forward equalizers (FFE), decision feedback equalizers (DFE), and continuous-time linear equalizers (CTLE). However, these electrical components rely heavily on the microelectronics process and consume a considerable amount of power. Additionally, their achievable speed is limited by the intrinsic bandwidth of electronic devices, such as the transistor's ft and the on-chip inductor's self-resonant frequency.

In contrast, optical equalization techniques shape the signal within the photonics device itself, leveraging the advantages of the electro-optic (E-O) modulation mechanism. The key idea is to use segmented Mach-Zehnder modulators (MZMs) with separate drivers for each segment, as illustrated in Figure 1.

Mach-Zehnder modulators (MZMs) with separate drivers for each segment
Fig.1: (a) Conceptual illustration of optical equalization with segmented MZM and multi-channel drivers. (b) Experimental setup. (c) Microscope view of the segmented silicon photonics modulators co-packaged with two CMOS drivers.(d-e)Characterization of the signal that is applied to the CMOS driver (d) 182G OOK (e)308G PAM-4. (f) BER results of 182G OOK with optical equalization enabled. (g) BER results of 308G PAM-4 with optical equalization enabled and disabled. (h)(i)(j)(k) Eye-diagram and BER results of different testing conditions.
Experimental Setup

The experimental setup, as shown in Figure 1(b), utilizes 112GBaud segmented silicon photonics transmitters, where two 28nm CMOS drivers are co-designed and flip-chip bonded with two segments of the modulator. The longer segment (2.47mm) has a 3dB E-O bandwidth of 43GHz, while the shorter segment (1.27mm) has a 3dB E-O bandwidth of 65GHz.

The optical equalization technique is implemented by applying two pairs of signals to the CMOS drivers, with a dedicated timing delay difference (Δt) introduced and controlled by an arbitrary waveform generator (AWG). By tuning the voltage gain of each driver, the voltage swing applied to each phase shifter can be adjusted to the desired level. Consequently, the shorter segment behaves as an equalization tap, while the longer segment operates as the main tap.

Experimental Results

The quality of the PRBS7 signals applied to the CMOS drivers is characterized, as shown in Figures 1(d) and 1(e). The available single-end eye amplitude is around 200-400mV, with a bit error rate (BER) level down to 6e-9 for 182G OOK and 1e-4 for 308G PAM-4.

The adoption of optical equalization enables a maximum achievable baud rate of 182G (OOK format) with a BER level down to 1e-3, which is better than the HD-FEC limit (3.8e-3). This is demonstrated in Figures 1(f), 1(h), and 1(i).

For PAM-4 signaling, the performance enhancement introduced by optical equalization is quantified. Comparing Figures 1(j) and 1(k), optical equalization sacrifices modulation depth (ER decreased from 3.49dB to 3.14dB) but improves eye-opening. The BER level is improved from 2.6e-2 (close to the SD FEC limit (2e-2)) to 4.5e-3 (close to the HD FEC limit (3.8e-3)).

Power Efficiency

The overall electrical power consumption of the proposed device is less than 257mW, including the CMOS drivers and the heating element on the photonics chip. With data rates exceeding 300Gb/s, the energy efficiency of the proposed device is far better than 1pJ/bit, which is an impressive achievement.

Conclusion

This work by Li et al. demonstrates the first integrated single-channel silicon photonics modulator operating at 300Gb/s and beyond, without the need for off-line DSP techniques at the receiver. By leveraging optical equalization techniques with segmented MZMs and multi-channel drivers, they achieved data rates of 182Gb/s (OOK) and 308Gb/s (PAM-4) with exceptional energy efficiency. This research paves the way for further advancements in high-speed optical communications using integrated silicon photonics technologies.

Reference

[1] K. Li, D. J. Thomson, L. Zhou, W. Zhang, S. Liu, W. Cao, C. G. Littlejohns, X. Yan, M. Ebert, M. Banakar, D. Tran, F. Meng, L. Wang, Z. He, F. Zhang, S. Yu, and G. T. Reed, "Beyond 300Gb/s from an integrated single-channel silicon photonics modulator driver combination," Silicon Photonics Group, Optoelectronics Research Centre, University of Southampton, Southampton, UK; Peng Cheng Laboratory, Shenzhen, China; State Key Laboratory of Advanced Optical Communication System and Networks, School of Electronics, Peking University, Beijing, China, 2024, pp. 1-6, doi: 979-8-3503-9404-7/24/$31.00 ©2024 IEEE.

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